All WIOWIZ EDA tools articles will be published here
WZ-HFT: Market Data to Order in 12 Cycles We have been building RISC-V cores, IP, VIP, accelerators and SoC reference designs. For WZ-HFT, we pushed those components through a latency-sensitive tradin
A multi-model AI chip on SKY130. At almost every stage, we hit something. Sometimes we found another route. Sometimes we changed the architecture. Sometimes we worked around the limitation. And someti
Code coverage and functional coverage are old buddies.Formal and UNR are more recent acquaintances.But as SoCs become increasingly dynamic, another dimension is becoming difficult to ignore: Power and
Multi-vendor AMS co-simulation has a fundamental architectural boundary. You have a digital verification environment on one side and an isolated SPICE waveform generator on the other. They interact
Most SoC evaluations start the same way.You receive RTL, documentation, and a list of tools to install before you can answer a simple question: 𝗗𝗼𝗲𝘀 𝘁𝗵𝗲 𝘀𝘆𝘀𝘁𝗲𝗺 𝗮𝗰𝘁𝘂𝗮𝗹𝗹𝘆 𝗿𝘂𝗻?W
Building an EDA platform is a marathon, not a sprint. Every mature verification platform today represents decades of engineering. We are still at the beginning of that journey, but we believe the righ
Introducing the Reusable Verification Platform (RVP) from WIOWIZ, designed to expedite the chip Design verification process. RVP generates the environment and simulates it on FSiMX, our proprietary fu
